The present invention relates to computer technology. More particularly, it relates to improved means and method for performing a divisional operation in accordance with floating point calculations and the computational operation of a computer.
In computer structures which have been provided heretofore, there has been provided a primary arithmetic unit, a memory unit, bus control units and input/output control units all tied together by a so-called CPU bus, a multiconductor bus in conventional architecture. In order to accomplish floating point capability, a separate arithmetic unit was added and tied into the system by way of the bus. That arrangement has the disadvantage of involving the bus control unit to determine the addressing of the floating point unit. Such an arrangement means that the primary arithmetic unit was idled while the floating point unit had completed its manipulations. Such an arrangement unduly complicates the structure of the system and, of necessity, slows down the operation of the system.
In performing a divisional operation, a counter was preset with a number representative of the number of significant digits in the numbers being manipulated. That counter will then be incremented on each division step until the incremented number equalled the preset number whereby to assure that the division had been carried out to the extent commensurate with the number of significant digits in the numbers being manipulated.